I can't access the page directly, because my browser doesn't leak enough identifying information to convince Reuters I'm not a bot, but an actual bot is perfectly capable of accessing the page.
If there really is enough market demand for this kind of processor, it seems like someone like NEC who still makes vector processors would be better poised than a startup rolling RISC-V
So, a Systolic Array[1] spiced up with a pinch of control flow and a side of compiler cleverness? At least that's the impression I get from the servethehome article linked upthead. I wasn't able to find non-marketing better-than-sliced-bread technical details from 3 minutes of poking at your website.
Text on the front page of the NS website* leads me to think you have a fancy compiler: "Intelligent software-defined hardware acceleration". Sounds like Cerebras to my non-expert ears.
The other company I can think of focusing on F64 is Fujitsu with its A64FX processor. This is an ARM64 with really meaty SIMD to get 3TFLOP of FP64.
I guess it it hard to compare chip for chip but the question is, if you are building a supercomputer (and we ignore pressure to buy sovereign) then which is better bang for the buck on representative workloads?
Servethehome[1] does a bit of a better job describing what maverick-2 is and why it makes sense.
[1]https://www.servethehome.com/nextsilicon-maverick-2-brings-d...
https://archive.is/6j2p4
I can't access the page directly, because my browser doesn't leak enough identifying information to convince Reuters I'm not a bot, but an actual bot is perfectly capable of accessing the page.
Same but I can’t access archive.is either because of the VPN
Odd that doesn't load for me but https://archive.ph/6j2p4 does
Curious if the architecture is similar to what is called “systolic” as in the Anton series of supercomputers: https://en.wikipedia.org/wiki/Anton_(computer)
I find it helpful to read a saxpy and GEMM kernel for a new accelerator like this - do they have an example?
If there really is enough market demand for this kind of processor, it seems like someone like NEC who still makes vector processors would be better poised than a startup rolling RISC-V
I work in NS. The riscv was the "one more thing" aspect of the "reveal".
The main product/architecture discussed has nothing to do with vector processors or riscv.
It's a new, fundamentally different data-flow processor.
Hopefully we will improve in explaining what we do and why people may want to care.
So, a Systolic Array[1] spiced up with a pinch of control flow and a side of compiler cleverness? At least that's the impression I get from the servethehome article linked upthead. I wasn't able to find non-marketing better-than-sliced-bread technical details from 3 minutes of poking at your website.
[1]: https://en.wikipedia.org/wiki/Systolic_array
Text on the front page of the NS website* leads me to think you have a fancy compiler: "Intelligent software-defined hardware acceleration". Sounds like Cerebras to my non-expert ears.
* https://www.nextsilicon.com
The other company I can think of focusing on F64 is Fujitsu with its A64FX processor. This is an ARM64 with really meaty SIMD to get 3TFLOP of FP64.
I guess it it hard to compare chip for chip but the question is, if you are building a supercomputer (and we ignore pressure to buy sovereign) then which is better bang for the buck on representative workloads?
Sounds like an idea that would really benefit from a JIT-like approach to basically every software.